Digital Design / Verification Engineer (IC Design / Application Engineer)

Title Digital Design / Verification Engineer (IC Design / Application Engineer)
Company Intersil
Location

Wuhan, China

Description

Digital circuit IC Design Flow

Requirement

•    Master degree or above in Microelectronics, telecommunications or related field
•    3+ years or above of ASIC design and simulation working experience; familiar with the entire IC design flow
•    Have the ability to build testbench, to have a clear understanding of coverage
•    Familiar with the VHDL language, proficiency using a variety of popular EDA tools
•    Excellent understanding of written English
•    Good communication skills and cooperative spirits
•    Outstanding self-management skills and achieve goal under pressure

Contact

Intersil is an Equal Opportunity Employer
For more information, or to apply, visit http://www.intersil.com/careers/jobsearch.asp