Member Of Technical Staff (High Speed DRAM Interface Designer)

Title Member of Technical Staff (High Speed DRAM Interface Designer)
Company MediaTek
Location

San Jose, CA/ Hsinchu, Taiwan

Description

1.    High speed DRAM controller architecture design
2.    High speed DRAM (DDR, DDR2, DDR3) interface design

Requirement

•    Familiar with Verilog and IC design flow
•    Familiar with various DRAM (SDR, DDR, GDDR, LPDDR) interface protocol
•    Experience with GHz speed DRAM Interface architecture and design
•    Experience with system bus architecture or DRAM bandwidth evaluation skill is a plus
•    Experience with SI/PI analysis is a plus

Contact

To Apply:  Please send your resume to mediatekusa@mediatek.com