ASIC Design Engineer

Title ASIC Design Engineer
Company Marvell
Location

Santa Clara,CA

Description

. Design and verify integrated storage SOCs for mobile storage systems.
. Test bench development for the whole SOC.
. Understand customer requirements, technical standard such as DDR, Serial ATA, Serial Attached SCSI, Fibre Channel, PCI and PCI-Express. 
. Write spec of design architecture. 
. Design behavior models and test benches. 
. Realize the design in FPGA platform and verify the design in a real system. 
. Work on logic synthesis and static timing analysis. 
. Work with back-end and layout engineers on chip-level floor-planning, power planning, macro and standard cell placement, clock tree synthesis, design rule checks and post-layout timing analysis. 
. Create SCAN and Functional test patterns for production test. 
. Conduct test plans to identify functional problems and performance issues with the silicon during the chip evaluation process.

Requirement

Experience or Skill must include: 
. Verilog RTL coding 
. Familiarity with SoC modular verification methodologies
. Logic synthesis and static timing analysis 
. Lab Experience bringing up silicon sample 
. IP integration and SOC Design flow
. Knowledge of SystemVerilog is a plus
. Knowing ARM and Hard Disk Drive Controller is a plus.

Contact

Please go to https://www.marvell.apply2jobs.com/ProfExt/index.cfm?fuseaction=mExternal.showJob&RID=7042  and follow the instruction to submit your resume.