Engineer, Staff Design

Title Engineer, Staff Design
Company Marvell

Santa Clara,CA


Responsible for the design and development of high-speed/low power digital circuit for read channel and data storage PHY products. Principal job responsibilities include the development of specification, detailed circuit design, functional and timing simulation and verification. Additional duties include the supervision of the layout of the design, which includes layout floor planning, place and route, parasitic extraction, LVS and DRC. Work with test engineers to evaluate, validate and debug silicon device.


Prefer MSEE/PhD preferred.
Experience in high speed custom digital circuit and RTL design. Experience in datapath design.
Working knowledge of Verilog, Synopsys DC-Compiler, Primetime
Working knowledge of NC-Verilog or VCS.
Familiar with layout tools.
Read channel and data storage signal procession experience/background a plus
Matlab and C/C++ a plus


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